Case study 08

Work in progress

Hardware-in-the-Loop Testing for Embedded Valve Control

Developing a HIL platform that connects a physical ESP32-C6 controller to a valve emulator on NI ELVIS III. The project investigates command sequencing, fault handling and timing through physical digital I/O, controlled fault injection and experimental evaluation.

Discipline
EMBEDDED SYSTEMS / HARDWARE-IN-THE-LOOP / VALVE CONTROL
Course
TPK4560 — Robotics and Automation, Specialization Project
Project type
academic
Period
Autumn 2026 — ongoing
Evidence
Project summary
My role
Test platform development and controller testing

01 / Engineering challenge

The system behind the project

This ongoing 15-credit specialisation project at NTNU is supervised by Amund Skavhaug. It asks how accurately and repeatably a HIL platform can reproduce defined valve behaviour and faults, and how effectively it can verify the controller's sequencing, timeout and fault-handling logic. The work is motivated by verification challenges in industrial automation and subsea control systems, where access to physical equipment can make fault testing difficult. The valve model is a generic benchmark with defined experimental assumptions; it does not represent a validated commercial subsea actuator.

02 / My responsibility

What I personally worked on

My work covers controller firmware in C using ESP-IDF and FreeRTOS, physical I/O integration, the LabVIEW valve model, fault-injection design and experimental planning. I am now developing automated tests and structured data collection to evaluate controller behaviour and the timing and repeatability of the test platform.

Engineering focus

  • — Hardware-in-the-loop testing
  • — State machines, sequencing and timeouts
  • — Fault injection and requirements-based testing
  • — Timing measurements and repeatability

Tools and methods

Embedded CESP-IDFFreeRTOSLabVIEWESP32-C6NI ELVIS IIIDigital I/OTimestamped logging

03 / Design and implementation

From concept to working system

  1. 01

    Run C firmware on an ESP32-C6 using ESP-IDF and FreeRTOS. Separate tasks handle user commands and valve-control logic, with commands passed through a queue.

  2. 02

    Use a state machine with UNKNOWN, CLOSED, OPENING, OPEN, CLOSING and FAULT states. Monitor movement timeouts and contradictory feedback; a latched FAULT state sets both movement outputs LOW and rejects further movement requests.

  3. 03

    Run a simplified valve model in LabVIEW on the NI ELVIS III real-time processor. Configurable constant-speed movement updates a bounded position, while a stuck-valve condition freezes movement.

  4. 04

    Connect the controller and emulator through two digital movement commands and two end-position signals. Record timestamped command and status messages, with an initial software test mode for artificial feedback during firmware development.

04 / Testing and outcome

What the work demonstrated

The initial prototype has demonstrated normal opening and closing and a stuck-valve scenario. Physical I/O exchange, queue-based command handling, the valve state machine, movement timeout and contradictory-feedback detection are implemented. These demonstrations establish basic functionality. Systematic evaluation against predefined requirements, including measurements of reaction time, model-update timing, signal-generation delays and repeatability, remains in progress.

05 / Next iteration

Next steps in the project

  • 1Develop requirements-based tests for normal operation, stuck and slow movement, missing feedback, contradictory feedback and plausible but incorrect position indications.
  • 2Automate test sequences and collect an experimental dataset linking each test condition to the observed controller response.
  • 3Measure event-to-response time, actual model-update timing and signal-generation delays, then assess variation across repeated runs.
  • 4Document detection limits: a blocked valve and a failed end-position sensor can produce the same observations when only two end-position signals are available.
  • 5Produce a reproducible test procedure and scientific report documenting the platform's capabilities, limitations and results against the requirements.